Showing posts with label course. Show all posts
Showing posts with label course. Show all posts

Thursday, 17 March 2011

initiate hardware interrupts in 8085 microprocessor

List the type of signals that have to be applied to initiate hardware interrupts in 8085.

It has three pins for interrupts; NMI, IRQ and FIRQ. A low level on any of these pins will cause an interrupt. The machine state will then be stacked and the routine entered. The appropriate routine address is found in a table of interrupt vectors. Two locations are dedicated to each Interrupt pin, in which are loaded the two bytes of the interrupt routine address.

An order of priority is imposed - the interrupts at the top of the list set the flag bits of the other interrupts to stop them interrupting during the interrupt service routine. The former values of these bits are restored when the flag register is pulled off the stack on return from the interrupt. Further interrupts are then free to occur thereafter.

Friday, 11 February 2011

Project Specifications in Software Engineering

For what purpose Specifications are actually meant?

A specification document describes how something is supposed to be done. This document may be very detailed, defining the minutia of the implementation; for example, a specifications document may list out all of the possible error states for a certain form, along with all of the error messages that should be displayed to the user. Sometimes, when a project doesn't meet its expected result, it may be referred to as being out of specification; the abbreviation OOS may also be used.

Five different specifications a project may have are:

1) Game company's product and game specifications are much more important for determining the quality of the product and their different games.

2) As with all performance measures, a company ensures that specifications are reasonable and measurable.

3) Company conveys financial information concerning desired products from a buyer to a seller.

4) With prescriptive specifications given by company there is little scope for misunderstanding in any dealing.

5) User of their games and buyers of their products have more opportunity to pass risk onto the company organizers, as they have the responsibility for the way the specification is met.

Tuesday, 1 February 2011

Interrupts in 6809 microprocessor

Interrupts:
The 6809, like most other microprocessors, has instructions and the hardware to handle interrupts. Interrupts are a mechanism for allowing outside events temporarily to divert the micro from its current program. When an interrupt arrives, a call is made to a nominated routine which runs an 'interrupt service routine' ending with a 'return' instruction which returns the micro to the interrupted program. So, an interrupt is just like a subroutine call except that control is not passed explicitly to the routine by the main program, but happens independently of it.
Interrupts are used for infrequent or irregular events which must be acted upon by the processor. The use of interrupts saves having to look periodically to see whether the event has occurred or not. This is known as polling and can tie the micro up for a large proportion of the time, especially if the event is a rare one, like power failure.

Implementation of Interrupts:
Most micros have one or more pins on them devoted to interrupts. A level (usually "0") on one of these pins causes the processor to enter an interrupt service routine (ISR), whose entry address is kept in a special area in memory. This is done by means of something very like a subroutine call; the return address is pushed onto the stack. The routine completes and a return from interrupt instruction is executed, which resumes execution of the interrupted program when a return from interrupt instruction (RTI) is executed. In order to avoid chaos, further interrupts on the same pin are not usually allowed between the arrival of the interrupt and the return from the interrupt routine.
Some processors allow multiple interrupts, which means that one interrupt service routine may itself be interrupted by another ISR. This is known as nesting interrupts. Whether or not an interrupt is serviced at all may be decided by the user, who may disable and enable interrupts, so that they may be ignored if they are not relevant.

Warnings:
Interrupts can be dangerous!! Care must be taken to ensure that interrupts do not corrupt information which is being used by the interrupted routine.
Finally, the cause of an interrupt MUST be cleared (if necessary) by the micro before the RTI instruction is executed, or else the processor will be immediately interrupted again, and you get into a deadlock situation.