Interrupts in 6809 microprocessor

Interrupts:
The 6809, like most other microprocessors, has instructions and the hardware to handle interrupts. Interrupts are a mechanism for allowing outside events temporarily to divert the micro from its current program. When an interrupt arrives, a call is made to a nominated routine which runs an 'interrupt service routine' ending with a 'return' instruction which returns the micro to the interrupted program. So, an interrupt is just like a subroutine call except that control is not passed explicitly to the routine by the main program, but happens independently of it.
Interrupts are used for infrequent or irregular events which must be acted upon by the processor. The use of interrupts saves having to look periodically to see whether the event has occurred or not. This is known as polling and can tie the micro up for a large proportion of the time, especially if the event is a rare one, like power failure.

Implementation of Interrupts:
Most micros have one or more pins on them devoted to interrupts. A level (usually "0") on one of these pins causes the processor to enter an interrupt service routine (ISR), whose entry address is kept in a special area in memory. This is done by means of something very like a subroutine call; the return address is pushed onto the stack. The routine completes and a return from interrupt instruction is executed, which resumes execution of the interrupted program when a return from interrupt instruction (RTI) is executed. In order to avoid chaos, further interrupts on the same pin are not usually allowed between the arrival of the interrupt and the return from the interrupt routine.
Some processors allow multiple interrupts, which means that one interrupt service routine may itself be interrupted by another ISR. This is known as nesting interrupts. Whether or not an interrupt is serviced at all may be decided by the user, who may disable and enable interrupts, so that they may be ignored if they are not relevant.

Warnings:
Interrupts can be dangerous!! Care must be taken to ensure that interrupts do not corrupt information which is being used by the interrupted routine.
Finally, the cause of an interrupt MUST be cleared (if necessary) by the micro before the RTI instruction is executed, or else the processor will be immediately interrupted again, and you get into a deadlock situation.