hardware interrupts in 8085 microprocessor

Explain hardware interrupts in 8085.

• When a device interrupts, it actually wants the MP to give a service which is equivalent to asking the MP to call a subroutine. This subroutine is called ISR (Interrupt Service Routine)
• Interrupts:
• The 8085 microprocessor has 5 interrupts. They are presented below in the order of their priority (from lowest to highest):
• INTR is mask able 8080Acompatible interrupt. When the interrupt occurs the processor fetches from the bus one instruction.
• RST5.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 2Ch (hexadecimal) address.
• RST6.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34Ch (hexadecimal) address.
• RST7.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 3Ch (hexadecimal) address.
• Trap is a non-maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 24h (hexadecimal) address.
• All maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5, RST6.5 and RST7.5 interrupts can be enabled or disabled individually using SIM instruction.

difference between hardware and software interrupts in 8085 microprocessor

Differentiate between hardware interrupts and software interrupts of 8085.

• The software interrupt is initiated by the main program, but the hardware interrupt is initiated by an external device.
• In 8085, the software interrupt cannot be disabled or masked but the hardware interrupt except TRAP can be disabled or masked.