Friday, 17 June 2011

polling in 8085 microprocessor

What do you mean by polling in 8085.

When the microprocessor receives an Interrupt Service Request (ISR) on the interrupt line it must determine which of the devices connected to that input sent the request.

Software Polling is one method by which it can do so.

In Software Polling:

A software routine is used to identify the device requesting service. It does so by checking each device to see if it was the one needing service.

Wednesday, 15 June 2011

hardware interrupts in 8085 microprocessor

Explain hardware interrupts in 8085.

• When a device interrupts, it actually wants the MP to give a service which is equivalent to asking the MP to call a subroutine. This subroutine is called ISR (Interrupt Service Routine)
• Interrupts:
• The 8085 microprocessor has 5 interrupts. They are presented below in the order of their priority (from lowest to highest):
• INTR is mask able 8080Acompatible interrupt. When the interrupt occurs the processor fetches from the bus one instruction.
• RST5.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 2Ch (hexadecimal) address.
• RST6.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34Ch (hexadecimal) address.
• RST7.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 3Ch (hexadecimal) address.
• Trap is a non-maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 24h (hexadecimal) address.
• All maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5, RST6.5 and RST7.5 interrupts can be enabled or disabled individually using SIM instruction.

Monday, 13 June 2011

Memory Mapping Scheme

What is the memory mapping scheme? Give any one advantage and disadvantage.

MEMORY MAPPING SCHEME:

WEB MAPPING:

Web mapping is the process of designing, implementing, generating and delivering maps on the World Wide Web and its product.

ADVANTAGE & DISADVANTAGE:

While web mapping primarily deals with technological issues, web cartography additionally studies theoretic aspects: the use of web maps, the evaluation and optimization of techniques and workflows, the usability of web maps, social aspects, and more.

Web maps can easily deliver up to date information. If maps are generated automatically from databases, they can display information in almost realtime. They don't need to be printed, mastered and distributed.

Reliability issues – the reliability of the internet and web server infrastructure is not yet good enough. Especially if a web map relies on external, distributed data sources, the original author often cannot guarantee the availability of the information.

Saturday, 23 April 2011

Processor Cycle

What is meant by processor cycle?

Processor Cycle is a term used to describe one aspect of a processor's performance: the number of clock cycles that happen when an instruction is being executed.

Friday, 22 April 2011

SIM Instruction in 8085 microprocessor

What is the function performed by SIM Instruction?

The SIM instruction in the 8085 microprocessor is used to set (SIM) the interrupt mask. With SIM, you can mask or unmask RST5.5, RST6.5, and RST7.5, you can reset the pending RST7.5 flip flop, and you can set or reset the SOD (Serial Output Data) pin.

Thursday, 21 April 2011

DAD instruction or command

What is a DAD instruction?

DAD - Double Register Add is used to add registers and is used in the assembly programming language.

For example:

Double Add HL to HL

Friday, 1 April 2011

difference between hardware and software interrupts in 8085 microprocessor

Differentiate between hardware interrupts and software interrupts of 8085.

  • The software interrupt is initiated by the main program, but the hardware interrupt is initiated by an external device.
  • In 8085, the software interrupt cannot be disabled or masked but the hardware interrupt except TRAP can be disabled or masked.