CMA instruction in 8085

Explain the execution of the instruction CMA in 8085.

CMA - Complement Accumulator

The Complement Accumulator (CMA) instruction provides a 1’s complement of the 8 bits in the A register, i.e the 1’s are set to 0’s and the 0’s are set to 1’s.

Jump Command

If the program counter is always one count ahead of the memory locations from which the machine code is being fetched, how does the microprocessor change the sequence of program execution with a "Jump" execution?

During a jump instruction, the program counter is loaded with a new address that is not necessarily the address of the next sequential instruction. After a jump, the program execution continues from the new location in memory.

Definitions of (a) Instruction Cycle (b) M/c cycle (c) T-state

Define: (a) Instruction Cycle (b) M/c cycle (c) T-state.

Instruction Cycle:

The time period during which one instruction is fetched from memory and executed when a computer is given an instruction in machine language. There are typically four stages of an instruction cycle that the CPU carries out:

1. Fetch the instruction from memory. This step brings the instruction into the instruction register, a circuit that holds the instruction so that it can be decoded and executed.

2. Decode the instruction.

3. Read the effective address from memory if the instruction has an indirect address.

4. Execute the instruction.

M/C CYCLE:

The processor cycle or machine cycle is the basic operation performed by the processor. To execute an instruction, the processor will run one or more machine cycles in a particular order.

T-state:

For any instruction cycle, Opcode fetch is the first machine cycle. We know that each machine cycle may have 3 to 6 T-states. This Opcode fetch machine cycle consists of 4 T-states.

T1 State:

During the T1 state, the contents of the program counter are placed on the 16 bit address bus.

T2 State:

opcode is placed on D0-D7 of the Address/Data bus.

T3 State:

the Opcode of the A/D bus is transferred to the instruction register of the microprocessor.

T4 State:

In this state the Opcode which was fetched from the memory is decoded.

List four interrupts of 8085 microprocessor

List four interrupts of 8085.

INTERRUPTS OF 8085

• INTR,
• RST7.5
• RST6.5
• RST5.5